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The X-Philes (2nd Revision)
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The X-Philes Number 1 (1995).iso
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ADDABIOZ.ASM
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Assembly Source File
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1991-07-31
|
7KB
|
109 lines
;**************************************************************
;
; addabioz.asm
;
; Jeffrey Schwartz
;
; 07-31-91
;
; (C) Texas Instruments Inc., 1992
;
; Refer to the file 'license.txt' included with this
; this package for usage and license information.
;
;**************************************************************
******************************************************************************
* *
* TMS320C25 A/D TO D/A LOOPBACK TEST - I/O STATUS (BIOZ) DRIVEN *
* *
* AUTHOR: Jeffrey Schwartz *
* DSP Applications *
* Texas Instruments *
* *
* THIS PROGRAM READS A VALUE FROM THE A/D AND WRITES IT BACK OUT TO THE D/A. *
* SINCE THIS PROGRAM IS BIOZ DRIVEN, THE BIO PIN IS POLLED UNTIL IT IS LOW. *
* THIS SIGNIFIES THAT A PERIPHERAL IS READY TO SEND OR RECEIVE DATA. *
* *
* IT IS ASSUMED THAT A 5 MHZ CRYSTAL IS BEING USED TO GENERATE THE SAMPLE *
* RATE OF THE AIB2. THE SAMPLE RATE CLOCK IS AT PORT ADDRESS 3. THE VALUE *
* THAT IS OUTPUT TO THIS CLOCK DETERMINES THE SAMPLE FREQUENCY OF THE AIB2 *
* WITH THE FOLLOWING CONVERSION: SAMPLE FREQUENCY = (5 MHZ) / (65535 - VALUE)*
* WHERE VALUE IS THE 16 BIT QUANTITY WRITTEN TO THE SAMPLE RATE CLOCK. *
* *
* TO RUN THIS PROGRAM ON THE XDS/22, A TI-TAGGED FILE MUST BE CREATED FROM *
* THIS FILE. AFTER INITIALIZING YOUR COMMUNICATION PROGRAM FOR USE WITH THE *
* XDS/22, BE SURE TO USE THE ITR COMMAND TO ALLOW THE ONBOARD PROGRAM RAM *
* AND DATA RAM TO RESPOND TO MEMORY-ACCESS CYCLES BEFORE DOWNLOADING. TO *
* RUN THIS PROGRAM ON THE SWDS, A .OUT FILE MUST BE CREATED. IN *
* BOTH CASES, THE FILES MUST BE LINKED WITH A .CMD FILE WHICH ALLOCATES *
* THE "ORG" AND "BODY" SECTIONS OF MEMORY. *
* *
* WITHOUT PROPER SETTING OF THE JUMPERS, THE AIB2 MAY NOT WORK WITH THIS *
* PROGRAM. THE PROPER SETTINGS ARE AS FOLLOWS: *
* *
* *
* AIB2 JUMPER SETTINGS *
* JUMPER SETTING JUMPER DESCRIPTION *
* E1 OFF ;MC/MP select A=MP(Vcc) B=MC(GND) >> WARNING! << *
* E2 A ;A:INT0, B:INT1, C:INT2 *
* E3 A-B ;A:BIOZ, B:INT , C:Use C17 and AIC together *
* E4 A ;A:End of conversion, B:Sample rate clock *
* E5 B ;A:Bypass S/H, B:Use sample and hold *
* E6 B ;A:20V range, B:10V range *
* E7 ON ;ON:Connects analog and digital ground *
* E8 A ;A:A/D for input, B:Codec/AIC for input *
* E9 B ;A:Input anti-alias filter, B:Bypass anti-alias *
* E10 OFF ;ON:Connect Vcc to C10/15 *
* E11 A ;EPROM type select (see AIB manual) *
* E12 A ;A:Start conv. on sample rate clk, B:start on A/D read*
* E13 A ;EPROM type select (see AIB manual) *
* E14 OFF ;If installed, supplies 8khz frame synch to CODEC *
* E15 A ;EPROM type select (see AIB manual) *
* E16 ON ;If installed, supplies 2.048 Mhz clock to CODEC *
* E17 OFF ;ON: AIC in byte mode OFF:AIC in word mode *
* E18 OFF ;ON: ties FSR & FSX together for CODEC operation *
* E19 OFF ;ON: ties FSR & FSX to C17 FSR *
* E20 B ;A:select audio power amp B:bypass amplifier *
* E21 A or B ;A:bypass smoothing filter for P2 output B: add filter*
* E22 A ;A:16 bit DAC as P2 output B:CODEC/AIC as output *
* E23 OFF ;A:generate clock B:use emulator clock *
* E24 OFF ;ON:1 I/O wait state OFF:No I/O wait state *
* E25 OFF ;ON:use program wait states OFF:No program wait states*
* E26 OFF ;ON:2 program wait states OFF:0 or 1 prog wait states *
* E27 OFF ;ON:2 I/O wait states OFF:1 or 2 I/O wait states *
* E28 ON ;ON:connects V+ to TB1 OFF:disconnects V+ *
* E29 ON ;ON:connects V- to TB1 OFF:disconnects V- *
* E30 B ;A:Use 2792 EPROM B:standard EPROM *
* E31 B ;A:Use 2792 EPROM B:standard EPROM *
* E32 B ;A:Use 2792 EPROM B:standard EPROM *
* E33 B ;A:Use 2792 EPROM B:standard EPROM *
* E34 OFF ;ON:connects DX0 and DX1 of C17 (second serial port) *
* E35 OFF ;ON:connects DR0 and DR1 of C17 (second serial port) *
* *
* NOTE THAT SOME OF THESE SETTINGS, SUCH AS THOSE FOR EPROM CONFIGURATION *
* ARE UNNECESSARY FOR THIS APPLICATION. *
******************************************************************************
.sect "ORG"
B START ; reset vector
* initialize
*
.sect "BODY"
START DINT ; disable interrupts
LARK 0,060h ; temp storage location for sample rate
LARP 0
*
LALK 0FFBAh ; load sample rate
SACL *
OUT *,PA3 ; set sample rate clock
*
* main loop
*
LOOP DINT ; disable interrupts
IN *,PA2 ; read A/D
OUT *,PA2 ; loopback to D/A
WAIT BIOZ LOOP ; enable interrupts/wait for interrupt
B WAIT
*
.end